CoreMark® Benchmark Report

Platform Overview

Processor	Pequeno RISC-V (PQR5), pqr5 v1.1
Pipeline	5-stage, inorder, single-issue
ISA	RV32IM
CPU configuration	MDSP Performance++
Target	FPGA, CMOD A7-35T Board, Artix-7, xc7a35tcpg236-1
Core clock speed	12 MHz
Compiler	riscv64-unknown-elf-gcc (GCC 14.2.0)
Compiler flags	-g -O3 -march=rv32im -mabi=ilp32 -ffreestanding -fno-stack-protector -fno-zero-initialized-in-bss -mstrict-align -fno-builtin -static -nostartfiles
Baremetal/OS	Baremetal
Memory	FPGA BRAMs for Instruction & Data, no cache

Linker Memory Layout

Instruction RAM size	32 kB
Data RAM size	8 kB

IRAM

.TEXT	0x00000000--0x00005348	21320 Bytes

DRAM

.RODATA	0x80000000--0x80000793	1939 Bytes
.DATA	0x80000794--0x800007B8	36 Bytes
.BSS	0x800007B8--0x800007C0	8 Bytes
Stack	0x800007C0--0x80002000	6208 Bytes

CoreMark® Performance Metrics

CoreMark iterations	400
Execution time	12.59 seconds
Iterations per second	31.75
CoreMark score	2.65 CoreMark/MHz

Report date: Aug 2026

CoreMark® Results on Board

Report date: Aug 2026

Image path : coremark_run.png

Useful URLs

• How to build & run CoreMark® ? - ../build_notes.txt
• For details on EEMBC CoreMark® - Visit the website