Siphon Regulator 1.0
Nanosattelite attitude determination and control system.
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stm32f1xx_it.c
Go to the documentation of this file.
1/* USER CODE BEGIN Header */
18/* USER CODE END Header */
19
20/* Includes ------------------------------------------------------------------*/
21#include "main.h"
22#include "stm32f1xx_it.h"
23/* Private includes ----------------------------------------------------------*/
24/* USER CODE BEGIN Includes */
25/* USER CODE END Includes */
26
27/* Private typedef -----------------------------------------------------------*/
28/* USER CODE BEGIN TD */
29
30/* USER CODE END TD */
31
32/* Private define ------------------------------------------------------------*/
33/* USER CODE BEGIN PD */
34
35/* USER CODE END PD */
36
37/* Private macro -------------------------------------------------------------*/
38/* USER CODE BEGIN PM */
39
40/* USER CODE END PM */
41
42/* Private variables ---------------------------------------------------------*/
43/* USER CODE BEGIN PV */
44
45/* USER CODE END PV */
46
47/* Private function prototypes -----------------------------------------------*/
48/* USER CODE BEGIN PFP */
49
50/* USER CODE END PFP */
51
52/* Private user code ---------------------------------------------------------*/
53/* USER CODE BEGIN 0 */
54
55/* USER CODE END 0 */
56
57/* External variables --------------------------------------------------------*/
58extern DMA_HandleTypeDef hdma_usart1_rx;
59/* USER CODE BEGIN EV */
60
61/* USER CODE END EV */
62
63/******************************************************************************/
64/* Cortex-M3 Processor Interruption and Exception Handlers */
65/******************************************************************************/
69void NMI_Handler(void)
70{
71 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
72
73 /* USER CODE END NonMaskableInt_IRQn 0 */
74 /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
75 while (1)
76 {
77 }
78 /* USER CODE END NonMaskableInt_IRQn 1 */
79}
80
84void HardFault_Handler(void)
85{
86 /* USER CODE BEGIN HardFault_IRQn 0 */
87
88 /* USER CODE END HardFault_IRQn 0 */
89 while (1)
90 {
91 /* USER CODE BEGIN W1_HardFault_IRQn 0 */
92 /* USER CODE END W1_HardFault_IRQn 0 */
93 }
94}
95
99void MemManage_Handler(void)
100{
101 /* USER CODE BEGIN MemoryManagement_IRQn 0 */
102
103 /* USER CODE END MemoryManagement_IRQn 0 */
104 while (1)
105 {
106 /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
107 /* USER CODE END W1_MemoryManagement_IRQn 0 */
108 }
109}
110
114void BusFault_Handler(void)
115{
116 /* USER CODE BEGIN BusFault_IRQn 0 */
117
118 /* USER CODE END BusFault_IRQn 0 */
119 while (1)
120 {
121 /* USER CODE BEGIN W1_BusFault_IRQn 0 */
122 /* USER CODE END W1_BusFault_IRQn 0 */
123 }
124}
125
129void UsageFault_Handler(void)
130{
131 /* USER CODE BEGIN UsageFault_IRQn 0 */
132
133 /* USER CODE END UsageFault_IRQn 0 */
134 while (1)
135 {
136 /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
137 /* USER CODE END W1_UsageFault_IRQn 0 */
138 }
139}
140
144void SVC_Handler(void)
145{
146 /* USER CODE BEGIN SVCall_IRQn 0 */
147
148 /* USER CODE END SVCall_IRQn 0 */
149 /* USER CODE BEGIN SVCall_IRQn 1 */
150
151 /* USER CODE END SVCall_IRQn 1 */
152}
153
157void DebugMon_Handler(void)
158{
159 /* USER CODE BEGIN DebugMonitor_IRQn 0 */
160
161 /* USER CODE END DebugMonitor_IRQn 0 */
162 /* USER CODE BEGIN DebugMonitor_IRQn 1 */
163
164 /* USER CODE END DebugMonitor_IRQn 1 */
165}
166
170void PendSV_Handler(void)
171{
172 /* USER CODE BEGIN PendSV_IRQn 0 */
173
174 /* USER CODE END PendSV_IRQn 0 */
175 /* USER CODE BEGIN PendSV_IRQn 1 */
176
177 /* USER CODE END PendSV_IRQn 1 */
178}
179
183void SysTick_Handler(void)
184{
185 /* USER CODE BEGIN SysTick_IRQn 0 */
186
187 /* USER CODE END SysTick_IRQn 0 */
188 HAL_IncTick();
189 /* USER CODE BEGIN SysTick_IRQn 1 */
190
191 /* USER CODE END SysTick_IRQn 1 */
192}
193
194/******************************************************************************/
195/* STM32F1xx Peripheral Interrupt Handlers */
196/* Add here the Interrupt Handlers for the used peripherals. */
197/* For the available peripheral interrupt handler names, */
198/* please refer to the startup file (startup_stm32f1xx.s). */
199/******************************************************************************/
200
204void DMA1_Channel5_IRQHandler(void)
205{
206 /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
207
208 /* USER CODE END DMA1_Channel5_IRQn 0 */
209 HAL_DMA_IRQHandler(&hdma_usart1_rx);
210 /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
211
212 /* USER CODE END DMA1_Channel5_IRQn 1 */
213}
214
215/* USER CODE BEGIN 1 */
216
217/* USER CODE END 1 */
main.h
: Header for main.c file. This file contains the common defines of the application.
UsageFault_Handler
void UsageFault_Handler(void)
This function handles Undefined instruction or illegal state.
Definition stm32f1xx_it.c:129
HardFault_Handler
void HardFault_Handler(void)
This function handles Hard fault interrupt.
Definition stm32f1xx_it.c:84
MemManage_Handler
void MemManage_Handler(void)
This function handles Memory management fault.
Definition stm32f1xx_it.c:99
hdma_usart1_rx
DMA_HandleTypeDef hdma_usart1_rx
Definition main.c:54
SVC_Handler
void SVC_Handler(void)
This function handles System service call via SWI instruction.
Definition stm32f1xx_it.c:144
PendSV_Handler
void PendSV_Handler(void)
This function handles Pendable request for system service.
Definition stm32f1xx_it.c:170
NMI_Handler
void NMI_Handler(void)
This function handles Non maskable interrupt.
Definition stm32f1xx_it.c:69
BusFault_Handler
void BusFault_Handler(void)
This function handles Prefetch fault, memory access fault.
Definition stm32f1xx_it.c:114
SysTick_Handler
void SysTick_Handler(void)
This function handles System tick timer.
Definition stm32f1xx_it.c:183
DMA1_Channel5_IRQHandler
void DMA1_Channel5_IRQHandler(void)
This function handles DMA1 channel5 global interrupt.
Definition stm32f1xx_it.c:204
DebugMon_Handler
void DebugMon_Handler(void)
This function handles Debug monitor.
Definition stm32f1xx_it.c:157
stm32f1xx_it.h
This file contains the headers of the interrupt handlers.
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